This is Set II of our three Computer Organization and Architecture (COA) MCQ sets. It is all about micro-operations: the small steps a processor does on data held in registers, such as add, subtract, AND, OR and shift.
About half the questions ask you to work out a result on 4-bit or 8-bit values, which is how these topics usually appear in university exams and GATE. Try each one on paper before you pick an option, then read the explanation to check your working.
How to use this set: pick an option for each question. You will see straight away whether it is right, with a short note on why. There are 15 questions.
What this set covers
- Arithmetic micro-operations: add, subtract, increment, decrement
- Subtraction using 2's complement
- Logic micro-operations: selective set, clear, complement and masking
- Logical, circular and arithmetic shifts
- Overflow on addition and on arithmetic left shift
- The arithmetic logic shift unit (ALU and shifter)
Computer Organization and Architecture MCQs with answers and explanations
Q1. How is the micro-operation R3 ← R1 - R2 usually carried out in hardware?
a) R1 minus R2 using a separate subtractor only
b) R1 plus the 1's complement of R2, plus 1
c) R2 plus the 1's complement of R1
d) R1 plus R2, then the result is complemented
Q2. What is the 2's complement of the 8-bit number 00110101?
a) 11001010
b) 11001011
c) 00110110
d) 10110101
Q3. Using 4-bit 2's complement arithmetic, what is the 4-bit result of 0111 - 0101, and what is the end carry?
a) 1110 with end carry 1
b) 0010 with end carry 1
c) 0010 with end carry 0
d) 1100 with end carry 0
Q4. An 8-bit register holds 00000000. What does it hold after the decrement micro-operation R ← R - 1?
a) 00000001
b) 11111111
c) 10000000
d) 00000000
Q5. Two signed 8-bit numbers, 01101100 (108) and 00110110 (54), are added. What is the outcome?
a) No overflow, because there is no carry out of the last bit
b) The result is 01101100 because the carry is discarded
c) The result 10100010 is correct and equals -94
d) The 8-bit result 10100010 has overflowed, since the true sum 162 does not fit
Q6. Register A holds 1010 and register B holds 1100. What is A after the selective-set operation?
a) 0010
b) 0110
c) 1000
d) 1110
Q7. Register A holds 1010 and register B holds 1100. What is A after the selective-clear operation A ← A AND B'?
a) 1000
b) 1110
c) 0010
d) 0110
Q8. Which logic micro-operation inverts only the bits of A that line up with 1s in B, and leaves the rest unchanged?
a) NOR
b) OR
c) AND
d) XOR
Q9. A mask operation is used to clear the high 4 bits of an 8-bit register and keep the low 4 bits. Which operation and mask value do this?
a) AND with 11110000
b) AND with 00001111
c) XOR with 11110000
d) OR with 00001111
Q10. How many different logic micro-operations are possible on two binary variables?
a) 16
b) 4
c) 32
d) 8
Q11. An 8-bit register holds 10110100. What does it hold after a logical shift right?
a) 01101000
b) 00101101
c) 01011010
d) 11011010
Q12. An 8-bit register holds 10010011. What does it hold after a circular shift left?
a) 00100111
b) 00100110
c) 11001001
d) 10010011
Q13. An 8-bit register holds the signed number 10110100. What does it hold after an arithmetic shift right?
a) 01011010
b) 01101000
c) 10011010
d) 11011010
Q14. An 8-bit register holds 01001101 (+77). After an arithmetic shift left, what happens?
a) The register is cleared because the value is too large
b) The result is 00100110 because the sign bit is kept
c) The result is 10011010 and overflow occurs, because the sign bit changed from 0 to 1
d) The result is 10011010 and there is no overflow
Q15. In Mano's arithmetic logic shift unit, what decides whether a given stage performs an arithmetic, a logic or a shift operation?
a) The selection inputs that drive a multiplexer at each stage
b) The carry input alone
c) The value of the most significant bit of the operand
d) The clock frequency
Quick revision notes
- Subtraction is done as A + B' + 1, so a single adder plus XOR gates on B can both add and subtract.
- Selective set = OR, selective clear = AND with B', selective complement = XOR, mask = AND.
- Logical shifts fill with 0. Circular shifts wrap the lost bit round. Arithmetic shift right copies the sign bit.
- Arithmetic shift left doubles the number and overflows if the sign bit changes.
- Signed addition overflows when two numbers of the same sign give a result of the opposite sign.
Frequently asked questions
What is the difference between a logical and an arithmetic shift right?
A logical shift right always fills the leftmost bit with 0, so it treats the number as unsigned. An arithmetic shift right copies the sign bit, so a signed number keeps its sign and is divided by 2.
Why do computers use 2's complement instead of sign-magnitude?
With 2's complement there is only one zero, and the same adder works for positive and negative numbers. Sign-magnitude needs extra logic to compare signs and has both +0 and -0.
Are these micro-operation questions asked in GATE?
Yes, GATE CSE often includes shift, 2's complement and overflow questions under computer organisation and digital logic. Practise doing them by hand quickly, since calculators do not help with binary.
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